Specified Monotonic by Design
I2C™ Interface up to 3.4 Mbps
On-Chip Output Buffer Amplifier, Rail-to-Rail Operation
Double-Buffered Input Register
Address Support for up to Two DAC5571s
Small 6 Lead SOT 23 Package
Operation From –40°C to 105°C
DESCRIPTION
The DAC5571 is a low-power, single-channel, 8-bit
buffered voltage output DAC. Its on-chip precision
output amplifier allows rail-to-rail output swing to be
achieved. The DAC5571 utilizes an I2C-compatible,
two-wire serial interface that operates at clock rates
up to 3.4 Mbps with address support of up to two
DAC5571s on the same data bus.
The output voltage range of the DAC is 0 V to VDD.
The DAC5571 incorporates a power-on-reset circuit
that ensures that the DAC output powers up at zero
volts and remains there until a valid write to the
device takes place. The DAC5571 contains a
power-down feature, accessed via the internal control
register, that reduces the current consumption of the
device to 50 nA at 5 V.
The low-power consumption of this part in normal
operation makes it ideally suited for portable battery
operated equipment. The power consumption is less
than 0.7 mW at VDD= 5 V reducing to 1 µW in power-down mode.
DAC7571/6571/5571 are 12/10/8-bit, single-channel
I2C DACs from the same family. DAC7574/6574/5574
and DAC7573/6573/5573 are 12/10/8-bit 2
quad-channel I C DACs. Also see DAC8571/8574 for
single/quad-channel, 16-bit I2C DACs.
| PIN |
NAME |
DESCRIPTION |
| 1 |
VOUT
|
Analog output voltage from DAC
|
| 2 |
GND |
Ground reference point for all circuitry
|
| 3 |
VDD |
Analog Voltage Supply Input |
| 4 |
SDA |
Serial Data Input |
| 5 |
SCL |
Serial Clock Input |
| 6 |
A0 |
Device Address Select |
|
LOT
TRACE
CODEP
|
Year(3 = 2003);
Month (1–9 = JAN–SEP; A=OCT,
B=NOV, C=DEC);LL–Random code generated
when assembly is requested
|
